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DM383AAAR01 датащи(PDF) 4 Page - Texas Instruments

номер детали DM383AAAR01
подробное описание детали  DM383 DaVinc Digital Media Processor
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производитель  TI1 [Texas Instruments]
домашняя страница  http://www.ti.com
Logo TI1 - Texas Instruments

DM383AAAR01 датащи(HTML) 4 Page - Texas Instruments

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DM383
SPRS870B – APRIL 2013 – REVISED DECEMBER 2013
www.ti.com
1.3
Description
DM383 DaVinci Digital Media Processors are a highly integrated, cost-effective, low-power, programmable
platform that leverages TI’s DaVinci processor technology to meet the processing needs of Car Black Box
Digital Video Recorders, Portable Digital Video Recorders, and similar devices in SD and HD resolutions.
The Programmable High-Definition Video Image Processor of the device supports 1080p60 of real time
H.264BP/MP/HP video encode or decode. The included best-in-class H.264 encoder provides high-quality
video encode for the lowest possible bit rate under all conditions, reducing valuable storage space to a
minimum. In addition, the device also supports other video codecs such as MJPEG, MPEG-2, and MPEG-
4. The device provides a full set of video preprocessing and postprocessing functions to ensure the best
video quality. The low power consumption and high performance of the device makes it particularly
suitable for portable and automotive applications.
The device enables original-design manufacturers (ODMs) and after-market manufacturers to quickly bring
to market devices featuring robust operating systems support, rich user interfaces, and high processing
performance through the maximum flexibility of a fully integrated mixed processor solution. The device
also combines programmable video and audio processing with a highly integrated peripheral set.
The device processors include a high-definition video and imaging coprocessor 2 (HDVICP2), to off-load
many video and imaging processing tasks for common video and imaging algorithms. Programmability is
provided by an ARM Cortex-A8 RISC CPU with NEON extension and high-definition video and imaging
coprocessors. The ARM lets developers separate control functions from A/V algorithms programmed on
coprocessors, thus reducing the complexity of the system software. The ARM Cortex-A8 32-bit RISC
processor with NEON floating-point extension includes: 32KB of instruction cache; 32KB of data cache;
256KB of L2 cache with ECC; 48KB of boot ROM; and 64KB of RAM.
The rich peripheral set provides the ability to control external peripheral devices and communicate with
external processors. For details on each peripheral, see the related sections in this document and the
associated peripheral reference guides. The peripheral set includes: HD Video Processing Subsystem;
two USB ports with integrated 2.0 PHY; two serializer McASP audio serial ports (with DIT mode); three
UARTs with IrDA and CIR support; four SPI serial interfaces; a CSI2 serial connection; three
MMC/SD/SDIO serial interfaces; four I2C master and slave interfaces; a parallel camera interface (CAM);
up to 125 general-purpose I/Os (GPIOs); eight 32-bit general-purpose timers; system watchdog timer;
DDR2/DDR3/DDR3L SDRAM interface; flexible 8- or 16-bit asynchronous memory interface; two
Controller Area Network (DCAN) modules; Serial ATA (SATA) 3.0 Gbps controller with integrated PHY; a
Spin Lock; and Mailbox.
Additionally, TI provides a complete set of development tools for the ARM which include C compilers and
a Microsoft® Windows® debugger interface for visibility into source code execution.
4
High-Performance System-on-Chip (SoC)
Copyright © 2013, Texas Instruments Incorporated
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