CS4341A

DS582PP1

3

5. REGISTER DESCRIPTION .................................................................................................... 15

5.1 Mode Control 1 (address 00h) .......................................................................................... 15

5.2 Mode Control 2 (address 01h) .......................................................................................... 15

5.3 Transition and Mixing Control (address 02h).................................................................... 17

5.4 Channel A Volume Control (address 03h) ........................................................................ 20

5.5 Channel B Volume Control (address 04h) ........................................................................ 20

6. CHARACTERISTICS AND SPECIFICATIONS ...................................................................... 21

ANALOG CHARACTERISTICS (CS4341A-KS) ..................................................................... 21

COMBINED INTERPOLATION & ON-CHIP ANALOG FILTER RESPONSE ........................ 23

SWITCHING SPECIFICATIONS - SERIAL AUDIO INTERFACE .......................................... 26

SWITCHING SPECIFICATIONS - CONTROL PORT INTERFACE ....................................... 27

SWITCHING SPECIFICATIONS - CONTROL PORT INTERFACE ....................................... 28

DC ELECTRICAL CHARACTERISTICS ................................................................................ 29

DIGITAL INPUT CHARACTERISTICS ................................................................................... 29

DIGITAL INTERFACE SPECIFICATIONS ............................................................................. 29

THERMAL CHARACTERISTICS AND SPECIFICATIONS .................................................... 29

RECOMMENDED OPERATING SPECIFICATION .............................................................. 30

ABSOLUTE MAXIMUM RATINGS ......................................................................................... 30

7. PARAMETER DEFINITIONS .................................................................................................. 31

Total Harmonic Distortion + Noise (THD+N) .......................................................................... 31

Dynamic Range ...................................................................................................................... 31

Interchannel Isolation ............................................................................................................. 31

Interchannel Gain Mismatch ................................................................................................... 31

Gain Error ............................................................................................................................... 31

Gain Drift ................................................................................................................................ 31

8. REFERENCES ........................................................................................................................ 31

9. PACKAGE DIMENSIONS ...................................................................................................... 32

LIST OF FIGURES

Figure 1.

Typical Connection Diagram .......................................................................................... 6

Figure 2.

I2S Data .........................................................................................................................8

Figure 3.

Left Justified up to 24-Bit Data ....................................................................................... 9

Figure 4.

Right Justified Data ........................................................................................................ 9

Figure 5.

De-Emphasis Curve ....................................................................................................... 9

Figure 6.

Control Port Timing, I2C Mode .................................................................................... 12

Figure 7.

Control Port Timing, SPI mode .................................................................................... 13

Figure 8.

ATAPI Block Diagram .................................................................................................. 19

Figure 9.

Output Test Load ......................................................................................................... 22

Figure 10. Maximum Loading ........................................................................................................ 22

Figure 11. Single-Speed Stopband Rejection ............................................................................... 24

Figure 12. Single-Speed Transition Band ..................................................................................... 24

Figure 13. Single-Speed Transition Band (Detail) ......................................................................... 24

Figure 14. Single-Speed Passband Ripple ................................................................................... 24

Figure 15. Double-Speed Stopband Rejection .............................................................................. 24

Figure 16. Double-Speed Transition Band .................................................................................... 24

Figure 17. Double-Speed Transition Band (Detail) ....................................................................... 25

Figure 18. Double-Speed Passband Ripple .................................................................................. 25

Figure 19. Serial Input Timing ....................................................................................................... 26

Figure 20. Control Port Timing - I2C Mode ................................................................................... 27

Figure 21. Control Port Timing - SPI Mode ................................................................................... 28