поискавой системы для электроныых деталей |
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SL16010DC датащи(PDF) 6 Page - List of Unclassifed Manufacturers |
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SL16010DC датащи(HTML) 6 Page - List of Unclassifed Manufacturers |
6 / 8 page Rev 2.6, August 1, 2010 Page 6 of 8 SL16010DC External Components and Design Considerations Typical Application Circuit SL16010DC XIN(1) VDD2(8) XOUT(10) SSCLK(5) SSEL1(3) SSEL0(7) 100MHz 27MHz CL1 CL2 0.1 μF VSS2(2) REFCLK(9) 27MHz VSS1(6) VDD1(4) 10 μF External crystal load capacitors are required if crystal is used. If external clock (XO) is used leave Pin-10 XOUT unconnected (N/C) and drive Pin-1 XIN with clock. VDD VDD 0.1 μF 5K 5K This example is configured for -0.5% Spread SSEL0=M (VDD/2) and SSEL1=LOW (VSS) 5K Figure 4. Typical Application Schematic Comments and Recommendations Crystal and Crystal Load: Only use a parallel resonant fundamental AT cut crystal. DO NOT USE higher overtone crystals. To meet the crystal initial accuracy specification (in ppm) make sure that external crystal load capacitor is matched to crystal load specification. To determine the value of CL1 and CL2, use the following formula; C1 = C2 = 2CL – (Cpin + Cp) Where: CL is load capacitance stated by crystal manufacturer Cpin is the SL16010 pin capacitance (4pF) Cp is the parasitic capacitance of the PCB traces. EXAMPLE; if a crystal with CL=12pF specification is used and Cp=1pF (parasitic PCB capacitance on PCB), 19 or 20pF external capacitors from pins XIN (pin-1) and XOUT (Pin-10) to VSS are required since CXIN=CXOUT=4pF for the SL1610DC product. Users must verify Cp value. Decoupling Capacitor: A decoupling ca pacitor of 0.1μF must be used between VDD1/2 pins and VSS1/2 pin. Place the capacitor on the component side of the PCB as close to the VDD1/2 pins as possible. The PCB trace to the VDD1/2 pins and to the VSS via should be kept as short as possible Do not use vias between the decoupling capacitor and the VDD1/2 pins. In addition, a 10uf capacitor should be placed between VDD and VSS. Series Termination Resistor: A series termination resistor is recommended if the distance between the outputs (REFCLK and SSCLK) and the load if PCB trace is over 1 ½ inch. The nominal impedance of the outputs is about 24 Ω. Use 22 Ω resistors in series with the outputs to terminate 50Ω trace impedance and place 22 Ω resistors as close to the clock outputs as possible. |
Аналогичный номер детали - SL16010DC |
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Аналогичное описание - SL16010DC |
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