HD74AC374/HD74ACT374

3

Functional Description

The HD74AC374/HD74ACT374 consists of eight edge-triggered flip-flops with individual D-type inputs

and 3-state true outputs. The buffered clock and buffered Output Enable are common to all flip-flops. The

eight flip-flops will store the state of their individual D inputs that meet the setup and hold time

requirements on the Low-to-High Clock (CP) transition. With the Output Enable (

OE) Low, the contents

of the eight flip-flops are available at the outputs. When the

OE is High, the outputs go to the high

impedance state. Operation of the

OE input does not affect the state of the flip-flops.

Truth Table

Inputs

Outputs

D

n

CP

OE

O

n

H

LH

L

LL

XX

H

Z

H :

High Voltage Level

L

:

Low Voltage Level

X :

Immaterial

Z

:

High Impedance

: Low-to-High Transition

Logic Diagram

CP

QQ

D

CP

QQ

D

CP

QQ

D

CP

QQ

D

CP

QQ

D

CP

QQ

D

CP

QQ

D

CP

OE

CP

QQ

D

Please note that this diagram is provided only for the understanding of logic operations and should not be

used to estimate propagation delays.