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74LVC16240A датащи(PDF) 4 Page - NXP Semiconductors |
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74LVC16240A датащи(HTML) 4 Page - NXP Semiconductors |
4 / 16 page 74LVC16240A All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved. Product data sheet Rev. 4 — 3 November 2011 4 of 16 NXP Semiconductors 74LVC16240A 16-bit buffer/line driver; 5V tolerant; inverting; 3-state 5. Pinning information 5.1 Pinning 5.2 Pin description Fig 3. Pin configuration SSOP48 and TSSOP48 74LVC16240A 1OE 2OE 1Y0 1A0 1Y1 1A1 GND GND 1Y2 1A2 1Y3 1A3 VCC VCC 2Y0 2A0 2Y1 2A1 GND GND 2Y2 2A2 2Y3 2A3 3Y0 3A0 3Y1 3A1 GND GND 3Y2 3A2 3Y3 3A3 VCC VCC 4Y0 4A0 4Y1 4A1 GND GND 4Y2 4A2 4Y3 4A3 4OE 3OE 001aaa440 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 Table 2. Pin description Name Pin Description 1OE 1 output enable input (active LOW) 2OE 48 output enable input (active HIGH) 3OE 25 output enable input (active HIGH) 4OE 24 output enable input (active LOW) GND 4, 10, 15, 21, 28, 34, 39, 45 ground (0 V) VCC 7, 18, 31, 42 supply voltage 1Y[0:3] 2, 3, 5, 6 data output 2Y[0:3] 8, 9, 11, 12 data output 3Y[0:3] 13, 14, 16, 17 data output 4Y[0:3] 19, 20, 22, 23 data output 1A[0:3] 47, 46, 44, 43 data input |
Аналогичный номер детали - 74LVC16240A_15 |
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Аналогичное описание - 74LVC16240A_15 |
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