 |
поискавой системы для электроныых деталей |
|
|
поискавой системы для электроныых деталей |
|
SMV320C6727B-SP датащи(PDF) 11 Page - Texas Instruments |
|
||||||||||||||||||||||||||||||
SMV320C6727B-SP датащи(HTML) 11 Page - Texas Instruments |
|
|
11 / 112 page  SMV320C6727B-SP www.ti.com SPRS675G – FEBRUARY 2013 – REVISED JANUARY 2014 2.5 Program Cache The C6727B DSP executes code directly from a large on-chip 32K-byte program cache. The program cache has these key features: • Wide 256-bit path to internal ROM/RAM • Single-cycle access on cache hits • 2-cycle miss penalty to internal ROM/RAM • Caches external memory as well as ROM/RAM • Direct-mapped • Modes: Enable, Freeze, Bypass • Software invalidate to support code overlay The program cache line size is 256 bits wide and is matched with a 256-bit-wide path between cache and internal memory. This allows the program cache to fill an entire line (corresponding to eight C67x+ CPU instructions) with only a single miss penalty of 2 cycles. The program cache control registers are listed in Table 2-4. Table 2-4. Program Cache Control Registers REGISTER NAME BYTE ADDRESS DESCRIPTION L1PISAR 0x2000 0000 L1P Invalidate Start Address L1PICR 0x2000 0004 L1P Invalidate Control Register CAUTION Any application which modifies the contents of program RAM (for example, a program overlay) must invalidate the addresses from program cache to maintain coherency by explicitly writing to the L1PISAR and L1PICR registers. The Cache Mode (Enable, Freeze, Bypass) is configured through a CPU internal register (CSR, bits 7:5). These options are listed in Table 2-5. Typically, only the Cache Enable Mode is used. But advanced users may utilize Freeze and Bypass modes to tune performance. Table 2-5. Cache Modes Set Through PCC Field of CSR CPU Register on C6727B CPU CSR[7:5] CACHE MODE 000b Enable (Deprecated - Means direct mapped RAM on some C6000 devices) 010b Enable - Cache is enabled, cache misses cause a line fill. 011b Freeze - Cache is enabled, but contents are unchanged by misses. 100b Bypass - Forces cache misses, cache contents frozen. Other Values Reserved - Not Supported Copyright © 2013–2014, Texas Instruments Incorporated Device Overview 11 Submit Documentation Feedback Product Folder Links: SMV320C6727B-SP |
Аналогичный номер детали - SMV320C6727B-SP_15 |
|
Аналогичное описание - SMV320C6727B-SP_15 |
|
|
ссылки URL |
| Конфиденциальность |
| ALLDATASHEETRU.COM |
| Вашему бизинису помогли Аллдатащит? [ DONATE ] |
Что такое Аллдатащит | реклама | контакт | Конфиденциальность | обмен ссыками | поиск по производителю All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
Russian ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
