LB11868V

No.A1915-7/11

*15. KBSET pin

Pch kickback absorption circuit setting pin.

Open: The kickback absorption circuit is activated at a VCC voltage of 7.4V (typ) or above.

Pull-down to GND: Always OFF

Pull-up to REG: Always ON (but when the IC power is OFF, the kickback absorption circuit is OFF)

If the Pch load is to be reduced due to the large fan current, short the KBSET pin to GND, and use a zener diode

between the power supply on the power side and GND.

Kickback absorption circuit ON: At OUTPOFF, the OUTP voltage is clamped at VCC + 0.85V (at room temperature

and inflow current 5mA (typ)).

Kickback absorption circuit OFF: At OUTPOFF, the OUTP voltage is clamped at 18V or so (at room temperature and

inflow current 5mA (typ)) in order to protect the pin.

At OUTPOFF, the maximum inflow current must not be exceeded.

*16. Pch FET

If the Pch kickback absorption circuit is activated and a zener diode between the power supply and GND is not used,

the kickback during phase switching is absorbed by Pch.

Since the circuit is activated with a high voltage difference between the drain and source, select a FET with

sufficiently high capability.

*17. Nch FET

If the Nch gate voltage fluctuates significantly due to the effects of switching, insert a capacitor between the gate and

GND.

Since an Nch diode is used during coil current regeneration, select a FET with sufficiently high capability.