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TS1109-20IDT833 датащи(PDF) 6 Page - Silicon Laboratories |
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TS1109-20IDT833 датащи(HTML) 6 Page - Silicon Laboratories |
6 / 20 page 2.4.2 VOUT Swing vs. Desired VSENSE and Applied Supply Voltage at VDD Although the Current Sense Amplifier draws its power from the voltage at its RS+ and RS– terminals, the signal voltage at the OUT terminal is provided by a buffer, and is therefore bounded by the buffer’s output range. As shown in the Electrical Characteristics table, the CSA Buffer has a maximum and minimum output voltage of: VOUT (max ) = VDD(min ) − 0.2V VOUT (min ) = 0.2V Therefore, the full-scale sense voltage should be chosen so that the OUT voltage is neither greater nor less than the maximum and minimum output voltage defined above. To satisfy this requirement, the positive full-scale sense voltage, VSENSE(pos_max), should be chosen so that: VSENSE(pos_max ) < VBIAS − VOUT (min ) GAIN Likewise, the negative full-scale sense voltage, VSENSE(neg_min), should be chosen so that: VSENSE(neg_min ) < VOUT (max ) − VBIAS GAIN For best performance, RSENSE should be chosen so that the full-scale VSENSE is less than ±75 mV. 2.4.3 Total Load Current Accuracy In the TS1109’s linear region where VOUT(min) < VOUT < VOUT(max), there are two specifications related to the circuit’s accuracy: a) the TS1109 CSA’s input offset voltage (VOS(max) = 150 µV), b) the TS1109 CSA’s gain error (GE(max) = 1%). An expression for the TS1109’s total error is given by: VOUT = VBIAS − GAIN × (1 ± GE) × VSENSE ± (GAIN × VOS) A large value for RSENSE permits the use of smaller load currents to be measured more accurately because the effects of offset voltag- es are less significant when compared to larger VSENSE voltages. Due care though should be exercised as previously mentioned with large values of RSENSE. 2.4.4 Circuit Efficiency and Power Dissipation IR loses in RSENSE can be large especially at high load currents. It is important to select the smallest, usable RSENSE value to minimize power dissipation and to keep the physical size of RSENSE small. If the external RSENSE is allowed to dissipate significant power, then its inherent temperature coefficient may alter its design center value, thereby reducing load current measurement accuracy. Precisely because the TS1109 CSA’s input stage was designed to exhibit a very low input offset voltage, small RSENSE values can be used to reduce power dissipation and minimize local hot spots on the pcb. 2.4.5 RSENSE Kelvin Connections For optimal VSENSE accuracy in the presence of large load currents, parasitic pcb track resistance should be minimized. Kelvin-sense pcb connections between RSENSE and the TS1109’s RS+ and RS– terminals are strongly recommended. The drawing below illustrates the connections between the current-sense amplifier and the current-sense resistor. The pcb layout should be balanced and symmetri- cal to minimize wiring-induced errors. In addition, the pcb layout for RSENSE should include good thermal management techniques for optimal RSENSE power dissipation. Figure 2.3. Making PCB Connections to RSENSE TS1109 Data Sheet System Overview silabs.com | Smart. Connected. Energy-friendly. Rev. 1.0 | 5 |
Аналогичный номер детали - TS1109-20IDT833 |
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Аналогичное описание - TS1109-20IDT833 |
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