поискавой системы для электроныых деталей |
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74LVC1G123DCURG4 датащи(PDF) 3 Page - Texas Instruments |
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74LVC1G123DCURG4 датащи(HTML) 3 Page - Texas Instruments |
3 / 26 page B GND VCC Q CLR 2 5 3 4 8 6 1 7 A Cext Rext/Cext 3 2 4 5 1 A VCC Rext/Cext B GND CLR Cext Q 6 7 8 Cext 3 2 5 8 1 A VCC B GND CLR Rext/Cext Q 4 6 7 SN74LVC1G123 www.ti.com SCES586D – JULY 2004 – REVISED JUNE 2015 5 Pin Configuration and Functions DCT Package DCU Package 8-Pin SSOP 8-Pin VSSOP Top View Top View See mechanical drawings for dimensions. YZP Package 8-Pin DSBGA Bottom View Pin Functions PIN I/O DESCRIPTION NAME NO. A 1 I Falling edge sensitive input; requires B and CLR to be held high. B 2 I Rising edge sensitive input; requires A to be held low and CLR to be held high. CLR 3 I Clear, Active Low; also can operate as rising edge sensitive input if A is held low and B is held high. GND 4 — Ground Q 5 O Output Cext 6 — Connects only to the external capacitor Rext/Cext 7 — Connects to the external capacitor and resistor VCC 8 — Power Copyright © 2004–2015, Texas Instruments Incorporated Submit Documentation Feedback 3 Product Folder Links: SN74LVC1G123 |
Аналогичный номер детали - 74LVC1G123DCURG4 |
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Аналогичное описание - 74LVC1G123DCURG4 |
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