поискавой системы для электроныых деталей |
|
MV-9300A датащи(PDF) 1 Page - Vectron International, Inc |
|
MV-9300A датащи(HTML) 1 Page - Vectron International, Inc |
1 / 5 page Vectron Interna onal • 267 Lowell Road, Hudson, NH 03051 • Tel: 1-88-VECTRON-1 • h p://www.vectron.com Page 1 of 5 MV-9300A 1-80 MHz High Performance VCXO Parameter and Condi ons Symbol Min. Typ. Max. Unit Condi on Output Frequency Range f 1 – 80 MHz Frequency Stability F_stab -20 – +20 PPM Inclusive of Ini al tolerance at 25 °C, and varia ons over opera ng temperature, aging, supply voltage and load -50 – +50 PPM Aging F_aging – – ±5 PPM 10 years Opera ng Temperature Range T_use -20 – +70 °C Extended Commercial -40 – +85 °C Industrial Supply Voltage Vdd 1.71 1.8 1.89 V Contact Vectron for any other voltage support between 2.5V and 3.3V 2.25 2.5 2.75 V 2.52 2.8 3.08 V 2.97 3.3 3.63 V Pull Range PR ± 50, ±80, ±100 PPM Upper Control Voltage VC_U 1.7 – – V Vdd = 1.8 V, Voltage at which maximum devia on is guaranteed. 2.4 – – V Vdd = 2.5 V, Voltage at which maximum devia on is guaranteed. 2.7 – – V Vdd = 2.8 V, Voltage at which maximum devia on is guaranteed. 3.2 – – V Vdd = 3.3 V, Voltage at which maximum devia on is guaranteed. Lower Control Voltage VC_L – – 0.1 V Voltage at which miminum devia on is guaranteed. Control Voltage Input Impedence Z_vin 100 – – kΩ For the voltage control pin Linearity Lin – 0.1 1 % Frequency Change Polarity Posi ve slope Control Voltage Bandwidth (-3dB) V_BW – 8 – kHz Contact Vectron for 16 kHz and other high bandwidth op ons Current Consump on Idd – 31 33 mA No load condi on, f = 20 MHz, Vdd = 2.5 V, 2.8 V or 3.3 V – 29 31 mA No load condi on, f = 20 MHz, Vdd = 1.8 V Standby Current I_std – – 70 μA All Vdds, ST = GND, output is Weakly Pulled Down Duty Cycle DC 45 – 55 % All Vdds Rise/Fall Time Tr, Tf – 1.5 2 ns Vdd = 1.8, 2.5, 2.8 or 3.3 V, 10% - 90% Vdd level Output Voltage High VOH 90% – – Vdd OH = -7 mA, IOL = 7 mA, (Vdd = 3.3 V) IOH = -4 mA, IOL = 4 mA, (Vdd = 2.8 V and Vdd = 2.5 V) IOH = -2 mA, IOL = 2 mA, (Vdd = 1.8 V) Output Voltage Low VOL – – 10% Vdd Input Pull-up Impedance Z_in – 100 250 kΩ For the OE/ST pin if available Start-up Time T_start – 6 10 ms OE Enable/Disable Time T_oe – – 150 ns f=80 MHz, all Vdds. For other freq, T_oe = 100 ns + 3 cycles Resume Time T_ resume – – 10 ms Measured from the me ST pin crosses 50% threshold RMS Period Ji er T_ji – 1.5 2 ps f = 75 MHz, Vdd = 2.5 V, 2.8 V or 3.3 V – 2 3 ps f = 75 MHz, Vdd = 1.8 V RMS Phase Ji er (random) T_phj – 0.6 1 ps f = 75 MHz, Integra on bandwidth = 12 kHz to 20 MHz, all Vdds Performance Specifica ons • Any frequency between 1 MHz and 80 MHz with 6 decimal places of accuracy • CMOS compa ble output • Industrial and extended commercial temperature ranges • Industry-standard packages: 3.2 mm x2.5 mm (4-pin), 5.0 mm x 3.2 mm (6-pin), 7.0 mm x 5.0 mm (6-pin) • Ideal for telecom clock synchroniza on, low bandwidth analog PLL, ji er cleaning, clock recovery, audio, video, FPGA, broadband and networking Features Applications Rev 1.2 Aug 2014 |
Аналогичный номер детали - MV-9300A |
|
Аналогичное описание - MV-9300A |
|
|
ссылки URL |
Конфиденциальность |
ALLDATASHEETRU.COM |
Вашему бизинису помогли Аллдатащит? [ DONATE ] |
Что такое Аллдатащит | реклама | контакт | Конфиденциальность | обмен ссыками | поиск по производителю All Rights Reserved©Alldatasheet.com |
Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
Family Site : ic2ic.com |
icmetro.com |