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LM21215AMH-1 датащи(PDF) 3 Page - Texas Instruments

номер детали LM21215AMH-1
подробное описание детали  15-A Ultra High-Efficiency Synchronous Buck Converter
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производитель  TI1 [Texas Instruments]
домашняя страница  http://www.ti.com
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LM21215AMH-1 датащи(HTML) 3 Page - Texas Instruments

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1
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3
4
5
6
7
8
20
19
18
17
16
15
14
13
SYNC
SS/TRK
EN
AVIN
PVIN
PVIN
PVIN
PGND
SW
SW
SW
SW
AGND
FB
COMP
PGOOD
EP
PGND
PGND
12
11 SW
9
10
SW
LM21215A
www.ti.com
SNOSB87C – MARCH 2011 – REVISED JANUARY 2016
5 Pin Configuration and Functions
PWP Package
20-Pin HTSSOP With Exposed Thermal Pad
Top View
Pin Functions
PIN
TYPE(1)
DESCRIPTION
NO.
NAME
Frequency synchronization input pin. Applying a clock signal to this pin forces the device to switch
1
SYNC
I
at the clock frequency. If left unconnected, the frequency defaults to 500 kHz.
Soft-start control pin. An internal 2-µA current source charges an external capacitor connected
2
SS/TRK
I
between this pin and AGND to set the output voltage ramp rate during startup. This pin can also be
used to configure the tracking feature.
Active high precision enable input. If not used, the EN pin can be left open, which will go high due to
3
EN
I
an internal pullup current source.
Analog input voltage supply that generates the internal bias. Connect PVIN to AVIN through a low
4
AVIN
P
pass RC filter to minimize the influence of input rail ripple and noise on the analog control circuitry.
Input voltage to the power switches inside the device. Connect these pins together at the device.
5–7
PVIN
P
Locate a low ESR input capacitance as close as possible to these pins.
8–10
PGND
G
Power ground pins for the internal power switches.
11–16
SW
P
Switch node pins. Tie these pins together locally and connect to the filter inductor.
17
PGOOD
O
Open-drain power good indicator.
18
COMP
O
Compensation pin is connected to the output of the voltage loop error amplifier.
19
FB
I
Feedback pin is connected to the inverting input of the voltage loop error amplifier.
20
AGND
G
Quiet analog ground for the internal reference and bias circuitry.
Exposed
Exposed metal pad on the underside of the package with an electrical and thermal connection to
EP
P
Pad
PGND. Connect this pad to the PC board ground plane to improve thermal dissipation.
(1)
P = Power, G = Ground, I = Input, O = Output.
Copyright © 2011–2016, Texas Instruments Incorporated
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