IFB1

ISET1

SEL1

SEL2

VIN

1

2

3

4

5

IFB2

ISET2

GND

IOUT

SW

10

9

8

7

6

Exposed

Thermal

Pad

TPS61150, TPS61151

www.ti.com

SLVS625E – FEBRUARY 2006 – REVISED NOVEMBER 2015

5 Device Comparison Tables

Table 1. OVP Options

OVP

PACKAGE

(TYPICAL)

MARKING

–40 to +85°C

TPS61150DRCR

28 V

BCQ

–40 to +85°C

TPS61151DRCR

22 V

BRH

–40 to +85°C

TPS61150DRCT

28 V

BCQ

–40 to +85°C

TPS61151DRCT

22 V

BRH

(1)

For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI

web site at www.ti.com.

Table 2. TPS6115x Mode Selection

SEL1

SEL2

IFB1

IFB2

H

L

Enable

Disable

L

H

Disable

Enable

H

H

Enable

Enable

L

L

Device shutdown

6 Pin Configuration and Functions

DRC Package

10-Pin VSON With Exposed Thermal Pad

Top View

Pin Functions

PIN

I/O

DESCRIPTION

NUMBER

NAME

1, 10

IFB1, IFB2

I

it can be disabled to open the current path.

Output current programming pins. The resistor connected to the pin programs its

2, 9

ISET1, ISET2

I

corresponding output current.

3, 4

SEL1, SEL2

I

Mode selection pins. See Table 2 for details.

The input pin to the device. It provides the current to the boost power stage and also

5

VIN

I

device turns off and disables outputs, thus disconnecting the WLEDs from the input.

6

SW

I

This is the switching node of the device.

The output of the constant current supply. It is directly connected to the boost

7

IOUT

O

converter output.

The ground of the device. Connect the input and output capacitors very close to this

8

GND

O

pin.

The thermal pad should be soldered to the analog ground. If possible, use thermal via

—

Thermal Pad

—

to connect to ground plane for ideal power dissipation.

Copyright © 2006–2015, Texas Instruments Incorporated

Submit Documentation Feedback

3

Product Folder Links: TPS61150 TPS61151