02044-DSH-002-A

Mindspeed Technologies™

March 2008

Mindspeed Proprietary and Confidential

M02044CG-31

3.3/5V Limiting Amplifier for Applications from 100 Mbps to

622 Mbps

Applications

• 622 Mbps SDH/SONET

• 100 Mbps Ethernet

• SDH/SONET 155 Mbps Transceivers

• FTTx and Media Converters

• Fast Ethernet Receivers

• FDDI 125 Mbps Receivers

•ESCON Receivers

The M02044 is a highly integrated high-gain limiting amplifier that can be used with the same board layout and foot-

print as the MC2044C (refer to 02044-APP-001-A where A is the revision which will change if the application note is

revised). Featuring PECL outputs, the M02044 is intended for use in applications from 100 Mbps to 622 Mbps. Full

output swing is achieved even at minimum input sensitivity. The M02044 can operate with a 3.3V or 5V supply.

Included in the M02044 is a programmable signal-level detector, allowing the user to set thresholds at which the

logic outputs are enabled. The signal detect function has typically 2 dB (optical) of hysteresis which prevents chatter

at low input levels. A squelch function, which turns off the output when no signal is present, is provided by externally

connecting the LOS Status output to the JAM input.

The M02044 has CMOS Status and LOS outputs.

Other available solutions: M02046-15 3.3/5V Limiting Amplifier for Applications to 1.25 Gbps (PECL outputs)

M02040-15 3.3/5V Limiting Amplifier for Applications to 2.125 Gbps (PECL outputs)

M02050-15 3.3/5V Limiting Amplifier for Applications to 2.5 Gbps (PECL outputs)

M02049-15 3.3/5V Limiting Amplifier for Applications to 4.3 Gbps (CML outputs)

M02043-15 3.3/5V Limiting Amplifier for Applications to 4.3 Gbps (CML outputs)

Typical Applications Diagram

optional

Limiting

Amplifier

Comparator

DINN

DINP

Offset cancel

Output

Buffer

Threshold

Setting

Circuit

Regulator

Biasing

Jam

LOS

AC-Coupled

to TIA

Level

Detect

ST

T I A

Photodiode

+3.3 V

MON

M02011

12.1 k

Ω

PECLN

PECLP

AC or DC Coupled

(as described in

Applications Information)

Clock Data

Recovery

Unit

100nF

100nF

6.8pF*

* The shunt capacitance is optional

but can improve receiver sensitivity

by ~0.5 dB

Features

• Pin compatible with the MC2044C

• Operates with a 3.3V or 5V supply

• 2.8 mV typical input sensitivity at 622 Mbps

• Programmable input-signal level detect

• On-chip DC offset cancellation circuit

• CMOS Signal Detect and LOS outputs

• Output Jam Function

• Low power (< 200 mW at 3.3V including PECL load)