поискавой системы для электроныых деталей |
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TPS51200-Q1 датащи(PDF) 3 Page - Texas Instruments |
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TPS51200-Q1 датащи(HTML) 3 Page - Texas Instruments |
3 / 36 page REFIN VLDOIN VO PGND VOSNS VIN PGOOD GND EN REFOUT Thermal Pad 10 9 8 7 6 1 2 3 4 5 TPS51200-Q1 www.ti.com SLUS984B – NOVEMBER 2009 – REVISED SEPTEMBER 2015 5 Pin Configuration and Functions DRC Package 10-Pin VSON With Exposed Thermal Pad Top View Pin Functions PIN I/O DESCRIPTION NAME NO. For DDR VTT application, connect EN to SLP_S3. For any other applications, use EN as the ON/OFF EN 7 I function. GND 8 — Ground. Signal ground. Connect to negative pin of the output capacitor. PGND(1) 4 — Power ground output for the LDO PGOOD 9 O PGOOD output. Indicates regulation. REFIN 1 I Reference input REFOUT 6 O Reference output. Connect to GND through 0.1- μF ceramic capacitor. 2.5-V or 3.3-V power supply A ceramic decoupling capacitor with a value between 1- μF and 4.7-μF is VIN 10 I required. VLDOIN 2 I Supply voltage for the LDO VO 3 O Power output for the LDO VOSNS 5 I Voltage sense output for the LDO. Connect to positive pin of the output capacitor or the load. (1) Thermal pad connection. See Figure 32 in the Thermal Considerations section for additional information. Copyright © 2009–2015, Texas Instruments Incorporated Submit Documentation Feedback 3 Product Folder Links: TPS51200-Q1 |
Аналогичный номер детали - TPS51200-Q1_15 |
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Аналогичное описание - TPS51200-Q1_15 |
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