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AD7989-5BCPZ-R2 датащи(PDF) 8 Page - Analog Devices

номер детали AD7989-5BCPZ-R2
подробное описание детали  18-Bit, 100 kSPS/500 kSPS PulSAR ADCs in MSOP/LFCSP
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производитель  AD [Analog Devices]
домашняя страница  http://www.analog.com
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AD7989-5BCPZ-R2 датащи(HTML) 8 Page - Analog Devices

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AD7989-1/AD7989-5
Data Sheet
PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
Figure 4. 10-Lead MSOP Pin Configuration
Figure 5. 10-Lead LFCSP Pin Configuration
Table 6. Pin Function Descriptions
Pin No.
Mnemonic
Type1
Description
1
REF
AI
Reference Input Voltage. The REF range is 2.4 V to 5.1 V. This pin is referred to the GND pin and should
be decoupled closely to the GND pin with a 10 µF capacitor.
2
VDD
P
Power Supply.
3
IN+
AI
Differential Positive Analog Input.
4
IN−
AI
Differential Negative Analog Input.
5
GND
P
Power Supply Ground.
6
CNV
DI
Conversion Input. This input has multiple functions. On its leading edge, it initiates the conversions and
selects the interface mode of the device: chain mode or chip select (CS) mode. In CS mode, the SDO pin is
enabled when CNV is low. In chain mode, the data is read when CNV is high.
7
SDO
DO
Serial Data Output. The conversion result is output on this pin. It is synchronized to SCK.
8
SCK
DI
Serial Data Clock Input. When the device is selected, the conversion result is shifted out by this clock.
9
SDI/CS
DI
Serial Data Input/Chip Select. This input has multiple functions. It selects the interface mode of the ADC as
follows:
Chain mode is selected if this pin is low during the CNV rising edge. In this mode, SDI/CS is used as a data
input to daisy-chain the conversion results of two or more ADCs onto a single SDO line. The digital data
level on SDI/CS is output on SDO with a delay of 16 SCK cycles.
CS mode is selected if SDI/CS is high during the CNV rising edge. In this mode, either SDI/CS or CNV can
enable the serial output signals when low.
10
VIO
P
Input/Output Interface Digital Power. This pin is nominally at the same supply as the host interface (1.8 V,
2.5 V, 3 V, or 5 V).
EP
Exposed Pad. For the lead frame chip scale package (LFCSP), the exposed pad can be connected to GND.
This connection is not required to meet the electrical performances.
1
AI = analog input, DI = digital input, DO = digital output, and P = power.
REF
1
VDD
2
IN+
3
IN–
4
GND
5
VIO
10
SDI/CS
9
SCK
8
SDO
7
CNV
6
AD7989-1/
AD7989-5
TOP VIEW
(Not to Scale)
NOTES:
1. THE EXPOSED PAD CAN BE CONNECTED TO GND.
1
REF
2
VDD
3
IN+
4
IN–
5
GND
10 VIO
9
SDI_CS
8
SCK
7
SDO
6
CNV
AD7989-1/
AD7989-5
TOP VIEW
(Not to Scale)
Rev. A | Page 8 of 24


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