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TDA4455 датащи(PDF) 5 Page - TEMIC Semiconductors |
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TDA4455 датащи(HTML) 5 Page - TEMIC Semiconductors |
5 / 12 page TELEFUNKEN Semiconductors TDA4455 Preliminary Information Rev. A1: 08.05.1995 5 (12) Unit Max. Typ. Min. Symbol Test Conditions / Pins Parameters IF residual voltage f = 38.9 MHz f = 77.8 MHz Vres1 Vres2 2 5 mV mV Upsetting factor of sync pulse in the AGC range DVsync Vsync 3 % Tilt of half picture between black and white Standard L 5 10 % Ultra black limiting threshold Below sync level DVlim1 250 mV Ultra white limiting threshold Above ultra white level DVlim2 500 mV Standard switch Pin 11 Control voltage B/G Note 6 Vsw1 2.5 4.0 V Control voltage L Vsw2 0 1.5 V Control voltage D2MAC Vsw3 5.0 Vs V Input selector switch Pin 16 Control voltage – input 1 active Note 7 5.0 VS V Control voltage – input 2 active 0 2.5 V Notes 1. A peak white value for at least 10 µs must be trans- mitted for each complete frame 2. Loop filter: R1 = 500 W – 1 k, C1 = 0.47 mF Capacitor VCO circuit: CVCO = 27 – 47 pF 3. Pin 7 unloaded 4. Residual carrier: 10% carrier amplitude 5. Blanking level: 30% carrier amplitude 6. Without control voltage at Pin 11 – standard B/G is automatically selected 7. Without control voltage at Pin 16 – input 1 is auto- matically active Alignment of the VCO 1. Apply 4.5 V to Pin 6, to disable the broadband amplifier. 2. Measure the dc-voltage at Pin 12 (phase detector). 3. Apply a 38.9 MHz unmodulated carrier signal to the IF input (Pins 1–2 or Pins 17–18); adjust the input level so that the AGC voltage at Pin 6 is between 2.0 V and 2.5 V. 4. Adjust the VCO circuit until at Pin 12 is the same DC- voltage as measured in step 2. |
Аналогичный номер детали - TDA4455 |
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Аналогичное описание - TDA4455 |
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