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ADC108S022 датащи(PDF) 2 Page - Texas Instruments

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номер детали ADC108S022
подробное описание детали  8-Channel, 50 ksps to 200 ksps, 10-Bit A/D Converter
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производитель  TI1 [Texas Instruments]
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ADC108S022 датащи(HTML) 2 Page - Texas Instruments

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IN0
IN7
MUX
T/H
ADC108S022
SCLK
VA
AGND
DGND
VD
CS
DIN
DOUT
CONTROL
LOGIC
10-BIT
SUCCESSIVE
APPROXIMATION
ADC
.
.
.
AGND
ADC108S022
SNAS338F – SEPTEMBER 2005 – REVISED MARCH 2013
www.ti.com
Block Diagram
PIN DESCRIPTIONS
Pin No.
Symbol
Description
ANALOG I/O
4 - 11
IN0 to IN7
Analog inputs. These signals can range from 0V to VREF.
DIGITAL I/O
Digital clock input. The ensured performance range of frequencies for this input is 0.8 MHz
16
SCLK
to 3.2 MHz. This clock directly controls the conversion and readout processes.
Digital data output. The output samples are clocked out of this pin on the falling edges of
15
DOUT
the SCLK pin.
Digital data input. The ADC108S022's Control Register is loaded through this pin on rising
14
DIN
edges of the SCLK pin.
Chip select. On the falling edge of CS, a conversion process begins. Conversions continue
1
CS
as long as CS is held low.
POWER SUPPLY
Positive analog supply pin. This voltage is also used as the reference voltage. This pin
2
VA
should be connected to a quiet +2.7V to +5.25V source and bypassed to GND with 1 µF
and 0.1 µF monolithic ceramic capacitors located within 1 cm of the power pin.
Positive digital supply pin. This pin should be connected to a +2.7V to VA supply, and
13
VD
bypassed to GND with a 0.1 µF monolithic ceramic capacitor located within 1 cm of the
power pin.
3
AGND
The ground return for the analog supply and signals.
12
DGND
The ground return for the digital supply and signals.
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
2
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