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ADC08D1000

SNAS248I – SEPTEMBER 2004 – REVISED FEBRUARY 2015

ADC08D1000 High Performance, Low Power, Dual 8-Bit, 1 GSPS A/D Converter

Not Recommended for New Designs

1 Features

4 Description

The ADC08D1000 is a dual, low power, high

1

•

Internal Sample-and-Hold

performance CMOS analog-to-digital converter that

•

Single +1.9V ±0.1V Operation

digitizes signals to 8 bits resolution at sampling rates

•

Choice of SDR or DDR Output Clocking

up to 1.3 GSPS. Consuming a typical 1.6 Watts at 1

GSPS from a single 1.9 Volt supply, this device is

•

Interleave Mode for 2x Sampling Rate

ensured to have no missing codes over the full

•

Multiple ADC Synchronization Capability

operating temperature range. The unique folding and

•

Ensured No Missing Codes

interpolating

architecture,

the

fully

differential

comparator design, the innovative design of the

•

Serial Interface for Extended Control

internal sample-and-hold amplifier and the self-

•

Fine Adjustment of Input Full-Scale Range and

calibration scheme enable a very flat response of all

Offset

dynamic parameters beyond Nyquist, producing a

•

Duty Cycle Corrected Sample Clock

high 7.4 ENOB with a 500 MHz input signal and a 1

2 Applications

Output formatting is offset binary and the LVDS

digital outputs are compatible with IEEE 1596.3-1996,

•

Direct RF Down Conversion

with the exception of an adjustable common mode

•

Digital Oscilloscopes

voltage between 0.8V and 1.2V.

•

Satellite Set-top boxes

Each converter has a 1:2 demultiplexer that feeds

•

Communications Systems

two LVDS buses and reduces the output data rate on

•

Test Instrumentation

each bus to half the sampling rate. The two

converters can be interleaved and used as a single 2

GSPS ADC.

3 Key Specifications

The converter typically consumes less than 3.5 mW

•

Resolution: 8 Bits

in the Power Down Mode and is available in a 128-

•

Max Conversion Rate: 1 GSPS (min)

lead, thermally enhanced exposed pad HLQFP and

•

operates over the Industrial (-40°C

•

ENOB @ 500 MHz Input: 7.4 Bits (typ)

temperature range.

•

DNL: ±0.15 LSB (typ)

Patenting Notice:

•

Power Consumption

The Texas Instruments products covered by this

–

Operating: 1.6 W (typ)

datasheet are protected by at least the following U.S.

patents: Pat. No. 6,847,320; Pat. No. 7,015,729; Pat.

–

Power Down Mode: 3.5 mW (typ)

No. 7,068,195; and Pat. No. 7,088,281. This list of

patents may not be all inclusive, and the products

covered by this datasheet may be protected by

additional issued patents and patents pending both in

the U.S. and elsewhere in the world. A copy of this

datasheet including the patent list noted here is also

available

on

the

Internet

www.ti.com/lit/gpn/adc08d1000. This is intended to

serve as notice under 35 U.S.C. § 287(a).

1

An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,

intellectual property matters and other important disclaimers. PRODUCTION DATA.