CD4051B-Q1, CD4052B-Q1, CD4053B-Q1

CMOS ANALOG MULTIPLEXERS/DEMULTIPLEXERS

WITH LOGIC−LEVEL CONVERSION

SCHS354A − AUGUST 2004 − REVISED JANUARY 2008

5

POST OFFICE BOX 655303

logic diagrams (positive logic) (continued)

11

10

9

6

12

3

5

1

2

13

TG

TG

TG

TG

TG

TG

4

ax

ay

bx

by

cx

cy

8

7

16

IN/OUT

15

14

CD4053B

Logic-Level

Conversion

Binary to

1-of-2

Decoders

With

Inhibit

COM OUT/IN

ac or ay

COM OUT/IN

bc or by

COM OUT/IN

xc or xy

−0.5 to 20 V

. . . . . . . . . . . . . . . . . . . . . .

DC input voltage range

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

DC input current, any one input

±10 mA

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Package thermal impedance,

73

°C/W

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

PW package

108

°C/W

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

150

°C

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Lead temperature (during soldering):

At distance 1/16

± 1/32 inch (1,59 ± 0,79 mm) from case for 10 s max

265

°C

. . . . . . . . . . . . . . . . . . . . . . .

−65

°C to 150°C

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not

implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

NOTE 1: The package thermal impedance is calculated in accordance with JESD 51-7.