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74ACT11825NT датащи(PDF) 1 Page - Texas Instruments |
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74ACT11825NT датащи(HTML) 1 Page - Texas Instruments |
1 / 7 page 74ACT11825 8BIT BUSINTERFACE FLIPFLOP WITH 3STATE OUTPUTS SCAS154A − D3715, NOVEMBER 1990 − REVISED APRIL 1993 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77001 Copyright 1993, Texas Instruments Incorporated 2−1 • Inputs Are TTL-Voltage Compatible • Multiple Output Enables Allow Multiuser Control of the Interface • Flow-Through Architecture Optimizes PCB Layout • Center-Pin V CC and GND Configurations Minimize High-Speed Switching Noise • EPIC (Enhanced-Performance Implanted CMOS) 1- µm Process • 500-mA Typical Latch-Up Immunity at 125°C description This device contains eight flip-flops that feature 3-state outputs designed specifically for driving highly-capacitive or relatively low-impedance loads. They are particularly suitable for implementing multiuser registers, I/O ports, bidirectional bus drivers, and working registers. With the clock-enable (CLKEN) input low, the eight edge-triggered D-type flip-flops enter data on the low-to-high transition of the clock. Taking CLKEN high disables the clock buffer, thus latching the outputs. The 74ACT11825 has noninverting data (D) inputs. Taking the clear (CLR) input low causes the eight Q outputs to go low independently of the clock. Multiuser buffered output-enable (OE1, OE2, and OE3) inputs can be used to place the eight outputs in either a normal logic state (high or low logic level) or a high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus lines without need for interface or pullup components. The output enable (OE) does not affect the internal operation of the flip-flops. Old data can be retained or new data can be entered while the outputs are in the high-impedance state. The 74ACT11825 is characterized for operation from − 40 °C to 85°C. FUNCTION TABLE INPUTS OUTPUT OE† CLR CLKEN CLK D OUTPUT Q L L X X X L L HL ↑ HH L HL ↑ LL L HH X X Q0 H X X X X Z † OE = H if any of OE1, OE2, or OE3 are high. OE = L if all of OE1, OE2, or OE3 are low. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. EPIC is a trademark of Texas Instruments Incorporated. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 28 27 26 25 24 23 22 21 20 19 18 17 16 15 OE1 1Q 2Q 3Q 4Q GND GND GND GND 5Q 6Q 7Q 8Q CLR OE2 OE3 1D 2D 3D 4D VCC VCC 5D 6D 7D 8D CLKEN CLK DW PACKAGE (TOP VIEW) |
Аналогичный номер детали - 74ACT11825NT |
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Аналогичное описание - 74ACT11825NT |
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