поискавой системы для электроныых деталей |
|
DM388AAARD21FP датащи(PDF) 2 Page - Texas Instruments |
|
|
DM388AAARD21FP датащи(HTML) 2 Page - Texas Instruments |
2 / 281 page DM385, DM388 SPRS821D – MARCH 2013 – REVISED DECEMBER 2013 www.ti.com • General-Purpose Memory Controller (GPMC) • Four Inter-Integrated Circuit (I2C Bus™) Ports – 8- or 16-Bit Multiplexed Address and Data • Two Multichannel Audio Serial Ports (McASP) Bus – Six Serializer Transmit and Receive Ports – 512MB of Total Address Space Divided – Two Serializer Transmit and Receive Ports Among up to 8 Chip Selects – DIT-Capable For S/PDIF (All Ports) – Glueless Interface to NOR Flash, NAND • Four Audio Tracking Logic (ATL) Modules Flash (BCH/Hamming Error Code Detection), • Real-Time Clock (RTC) SRAM and Pseudo-SRAM – One-Time or Periodic Interrupt Generation – Error Locator Module (ELM) Outside of • Up to 125 General-Purpose I/O (GPIO) Pins GPMC to Provide up to 16-Bit or 512-Byte • One Spin Lock Module with up to 128 Hardware Hardware ECC for NAND Semaphores – Flexible Asynchronous Protocol Control for • One Mailbox Module with 12 Mailboxes Interface to FPGA, CPLD, ASICs, and More • On-Chip ARM ROM Bootloader (RBL) • Enhanced Direct Memory Access (EDMA) • Power, Reset, and Clock Management Controller – SmartReflex™ Technology (Level 2b) – Four Transfer Controllers – Multiple Independent Core Power Domains – 64 Independent DMA Channels – Multiple Independent Core Voltage Domains – 8 QDMA Channels – Support for Multiple Operating Points per • Ethernet Switch with Dual 10-, 100-, or Voltage Domain 1000-Mbps External Interfaces (EMAC Software) – Clock Enable and Disable Control for Subsystems and Peripherals – IEEE 802.3 Compliant (3.3-V I/O Only) • 32KB of Embedded Trace Buffer™ (ETB™) and – MII/RMII/GMII/RGMII Media Independent 5-pin Trace Interface for Debug Interfaces • IEEE 1149.1 (JTAG) Compatible – Management Data I/O (MDIO) Module • 609-Pin Pb-Free BGA Package (AAR Suffix), – Reset Isolation 0.8-mm Effective Pitch with Via Channel – IEEE 1588 Time-Stamping and Industrial Technology to Reduce PCB Cost (0.5-mm Ball Ethernet Protocols Spacing) • Dual USB 2.0 Ports with Integrated PHYs • 45-nm CMOS Technology – USB2.0 High- and Full-Speed Clients • 1.8- and 3.3-V Dual Voltage Buffers for General – USB2.0 High-, Full-, and Low-Speed Hosts I/O – Supports End Points 0-15 • One PCI Express 2.0 Port with Integrated PHY – Supported on • All DM385 Devices • DM388 Devices with PCIe Enabled – Single Port with 1 Lane at 5.0 GT/s – Configurable as Root Complex or Endpoint • Eight 32-Bit General-Purpose Timers (Timer1–8) • One System Watchdog Timer (WDT0) • Three Configurable UART/IrDA/CIR Modules – UART0 with Modem Control Signals – Supports up to 3.6864 Mbps – SIR, MIR, FIR (4.0 MBAUD), and CIR • Four Serial Peripheral Interfaces (SPIs) (up to 48 MHz) – Each with Four Chip Selects • Three MMC/SD/SDIO Serial Interfaces (up to 48 MHz) – Supporting up to 1-, 4-, or 8-Bit Modes 2 High-Performance System-on-Chip (SoC) Copyright © 2013, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: DM385 DM388 |
Аналогичный номер детали - DM388AAARD21FP |
|
Аналогичное описание - DM388AAARD21FP |
|
|
ссылки URL |
Конфиденциальность |
ALLDATASHEETRU.COM |
Вашему бизинису помогли Аллдатащит? [ DONATE ] |
Что такое Аллдатащит | реклама | контакт | Конфиденциальность | обмен ссыками | поиск по производителю All Rights Reserved©Alldatasheet.com |
Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
Family Site : ic2ic.com |
icmetro.com |