AD5173EVAL1 datasheet(5/24 Pages) AD

номер детали	AD5173EVAL1

подробное описание детали	256-Position One-Time Programmable Dual-Channel I2C Digital Potentiometers

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AD5172/AD5173

Rev. A | Page 5 of 24

TIMING CHARACTERISTICS—2.5 kΩ, 10 kΩ, 50 kΩ, 100 kΩ VERSIONS

Table 3. VDD = 5 V ± 10% or 3V ± 10%; VA = VDD; VB = 0 V; –40°C < TA < +125°C; unless otherwise noted

Parameter

Symbol

Conditions

Min

Typ

Max

Unit

I2C INTERFACE TIMING CHARACTERISTICS1 (Specifications Apply to All Parts)

SCL Clock Frequency

fSCL

400

kHz

tBUF Bus Free Time between STOP and START

t1

1.3

µs

tHD;STA Hold Time (Repeated START)

t2

After this period, the first clock pulse is

generated.

0.6

µs

tLOW Low Period of SCL Clock

t3

1.3

µs

tHIGH High Period of SCL Clock

t4

0.6

µs

tSU;STA Setup Time for Repeated START Condition

t5

0.6

µs

tHD;DAT Data Hold Time2

t6

0.9

µs

tSU;DAT Data Setup Time

t7

100

ns

tF Fall Time of Both SDA and SCL Signals

t8

300

ns

tR Rise Time of Both SDA and SCL Signals

t9

300

ns

tSU;STO Setup Time for STOP Condition

t10

0.6

µs

1 See timing diagrams for locations of measured values.

2 The maximum tHD;DAT has only to be met if the device does not stretch the LOW period (tLOW) of the SCL signal.

Аналогичный номер детали - AD5173EVAL1

производитель	номер детали	датащи	подробное описание детали
Analog Devices	AD5173BRM10	864Kb / 24P	256-Position, One-Time Programmable, Dual-Channel, I2C Digital Potentiometers Rev. H
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Аналогичное описание - AD5173EVAL1

производитель	номер детали	датащи	подробное описание детали
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