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TPL5010

SNAS651 – JANUARY 2015

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Copyright © 2015, Texas Instruments Incorporated

(1)

Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings

only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended

Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

(2)

The voltage between any two pins should not exceed 6V.

(3)

board.

7 Specifications

7.1 Absolute Maximum Ratings

(1)

MIN

MAX

UNIT

Supply Voltage (VDD-GND)

-0.3

6.0

V

-0.3

VDD + 0.3

V

Input Current on any pin

-5

+5

mA

-65

150

°C

150

°C

(1)

JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.

(2)

JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

7.2 ESD Ratings

VALUE

UNIT

Electrostatic discharge

±1000

V

±250

7.3 Recommended Operating Ratings

MIN

MAX

UNIT

Supply Voltage (VDD-GND)

1.8

5.5

V

Temperature Range

-40

105

°C

(1)

For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.

7.4 Thermal Information

TPL5010

UNIT

SOT23

6 PINS

Junction-to-ambient thermal resistance

163

°C/W

Junction-to-case (top) thermal resistance

26

Junction-to-board thermal resistance

57

Junction-to-top characterization parameter

7.5

Junction-to-board characterization parameter

57

Junction-to-case (bottom) thermal resistance

N/A