MC10EL15, MC100EL15

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6

Figure 2. Typical Termination for Output Driver and Device Evaluation

(See Application Note AND8020/D − Termination of ECL Logic Devices.)

Driver

Device

Receiver

Device

QD

Q

D

50 W

50 W

Resource Reference of Application Notes

AN1405/D

− ECL Clock Distribution Techniques

AN1406/D

− Designing with PECL (ECL at +5.0 V)

AN1503/D

− ECLinPSt I/O SPiCE Modeling Kit

AN1504/D

− Metastability and the ECLinPS Family

AN1568/D

− Interfacing Between LVDS and ECL

AN1672/D

− The ECL Translator Guide

AND8001/D − Odd Number Counters Design

AND8002/D − Marking and Date Codes

AND8020/D − Termination of ECL Logic Devices

AND8066/D − Interfacing with ECLinPS

AND8090/D − AC Characteristics of ECL Devices