© Semiconductor Components Industries, LLC, 2011

June, 2011 − Rev. 10

1

Publication Order Number:

MC100EP210S/D

MC100EP210S

2.5V 1:5 Dual Differential

LVDS Compatible Clock

Driver

Description

The MC100EP210S is a low skew 1−to−5 dual differential driver,

designed with LVDS clock distribution in mind. The LVDS or

LVPECL input signals are differential and the signal is fanned out to

five identical differential LVDS outputs.

The EP210S specifically guarantees low output−to−output skew.

Optimal design, layout, and processing minimize skew within a device

and from device to device.

Two internal 50

W resistors are provided across the inputs. For

LVDS inputs, VTA and VTB pins should be unconnected. For

Designers can take advantage of the EP210S performance to

distribute low skew LVDS clocks across the backplane or the board.

Features

LQFP−32

FA SUFFIX

CASE 873A

MARKING

DIAGRAM*

*For additional marking information, refer to

Application Note AND8002/D.

http://onsemi.com

MC100

EP210S

AWLYYWWG

See detailed ordering and shipping information in the package

dimensions section on page 6 of this data sheet.

ORDERING INFORMATION

xxx

= 10 or 100

A

= Assembly Location

WL, L

= Wafer Lot

YY, Y

= Year

WW, W = Work Week

G

= Pb−Free Package

32

1

MCxxx

EP210S

ALYWG

1

QFN32

MN SUFFIX

CASE 488AM