поискавой системы для электроныых деталей |
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DM9000 датащи(PDF) 10 Page - List of Unclassifed Manufacturers |
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DM9000 датащи(HTML) 10 Page - List of Unclassifed Manufacturers |
10 / 54 page DM9000 ISA to Ethernet MAC Controller with Integrated 10/100 PHY 10 Final Version: DM9000-DS-F02 June 26, 2002 34 TXO- O TP TX Output 35 AVDD P TX Power 5.7 Miscellaneous 16,17,18, 19 TEST1~TEST4 I Operation Mode Test 1, 2, 3, 4 = (1, 1, 0, 0) in normal application 48 TEST5 I It must be ground. 68,69,70, 71 GPIO0~3 I/O General I/O Ports Registers GPCR and GPR can program these pins The GPIO0 is an output mode, and output data high at default is to power down internal PHY and other external MII device GPIO1~3 defaults are input ports 78 LINK_O O Cable Link Status Output. Active High This pin is also used as a strap pin to define whether the MII interface is a reversed MII interface (pulled high) or a normal MII interface (not pulled high). This pin has a pulled down resistor about 60k ohm internally. 79 WAKEUP O Issue a wake up signal when wake up event happens This pin has a pulled down resistor about 60k ohm internally. 80 PW_RST# I Power on Reset Active low signal to initiate the DM9000 The DM9000 is ready after 5us when this pin deasserted 74,75,77 NC Not Connect 5.8 Power Pins 5,20,36, 55,72,90, 73 DVDD P Digital VDD 15,23,42, 58,63,81, 99,76 DGND P Digital GND |
Аналогичный номер детали - DM9000 |
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Аналогичное описание - DM9000 |
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