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TPS3306-20 датащи(PDF) 4 Page - Texas Instruments |
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TPS3306-20 датащи(HTML) 4 Page - Texas Instruments |
4 / 16 page TPS330615Q1, TPS330618Q1, TPS330620Q1, TPS330625Q1, TPS330633Q1 DUAL PROCESSOR SUPERVISORY CIRCUITS WITH POWER FAIL SGLS241B − MARCH 2004 − REVISED APRIL 2008 4 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 timing diagram t t t td td td Reset Due to Power Down Reset Due to WDI Reset Due to Power Drop Below VIT− Reset Due to Power Up tt(out) SENSEn V(nom) VIT 1.1 V WDI 1 0 RESET 1 0 Undefined Behavior Undefined Behavior Terminal Functions TERMINAL I/O DESCRIPTION NAME NO. I/O DESCRIPTION GND 4 I Ground PFI 3 I Power-fail comparator input PFO 6 O Power-fail comparator output, open drain RESET 5 O Active-low reset output, open drain SENSE1 1 I Sense voltage 1 SENSE2 2 I Sense voltage 2 WDI 7 I Watchdog timer input VDD 8 I Supply voltage detailed description watchdog In a microprocessor- or DSP-based system, it is not only important to supervise the supply voltage, it is also important to ensure correct program execution. The task of a watchdog is to ensure that the program is not stalled in an indefinite loop. The microprocessor, microcontroller, or DSP has to typically toggle the watchdog input (WDI) within 0.8 s to avoid a time-out occurring. Either a low-to-high or a high-to-low transition resets the internal watchdog timer. If the input is unconnected or tied with a high-impedance driver, the watchdog is disabled and is retriggered internally. |
Аналогичный номер детали - TPS3306-20 |
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Аналогичное описание - TPS3306-20 |
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