Functional Description

02139-DSH-001-D

Mindspeed Technologies

®

9

Mindspeed Proprietary and Confidential

3.2

General Description

3.2.1

TIA (Transimpedance Amplifier)

The transimpedance amplifier consists of a high gain single-ended amplifier (TIA) with a feedback resistor. The

feedback creates a virtual low impedance at the input and nearly all of the input current passes through the

feedback resistor defining the voltage at the output. Advanced design techniques are employed to maintain the

stability of this stage across all input conditions.

An on-chip low dropout linear regulator has been incorporated into the design to give excellent noise rejection up to

several MHz.

The circuit is designed for PIN photodiodes with the anode connected to the input of the TIA and the cathode

connected to AC ground, such as the provided PINK terminal. Reverse DC bias is applied to reduce the photodiode

capacitance. PIN photodiodes and Avalanche photodiodes may also be connected externally to a voltage higher

the bias voltage does not appear when the TIA is powered down. Doing so may cause damage to the input of the

TIA, as the photodiode bias can become capacitively coupled to the PIN input, and cause damage.

3.2.2

Output Stage

The signal from the TIA enters a phase splitter followed by a DC-shift stage and a pair of voltage follower outputs.

These are designed to drive a differential (100

Ω) load. They are stable for driving capacitive loads such as

interstage filters. Each output has its own GND pad; it is recommended but not required that all four GND pads on

the chip should be connected. Since the M02139 exhibits rapid roll-off (3 pole), no external filtering is necessary.

3.2.3

Offset Cancellation DC Servo

Due to the high gain of the M02139 transimpedance amplifier, any amount of input offset voltage would be

amplified and create distortion at the output. Therefore, an offset cancellation circuit is used to remove input offset.

The RC offset cancellation circuit sets the low frequency cutoff to 50 kHz.

3.2.4

Monitor O/P and Rate Select Between 1G and 10G Operations

The monitor is a high impedance output which sources an average photodiode current for alignment or power

monitoring use. This output is mirrored off the PINK current source, and PINK must be used to enable IMON

usage. If PINK is not used as in the case of externally biased PIN or APD detectors, then photo current must be

monitored via that external bias supply and the MON pin tied to high or low depending on the input data rate.

This output is compatible with the DDMI Receive Power Specification (SFP-8472). An interfacing example is shown

below where the M02139 is connected to the M0217x driver family General Purpose I/O (GPIO) and Rx Power

monitoring A/D. Ensure that the voltage on VMON is in the range of 0 to 2.0 V. Refer to Table 3-1 and Figure 3-2.

Table 3-1.

Selection of Rm for Maximum Input Current

Optical Power (dBm)

Rm (

Ω)

2+3

500

1

0

1000

0.5

-3

2000