Functional Diagram

* Pin 3 is the anode of the internal LED and must be left unconnected for

guaranteed data sheet performance. Pin 7 is not connected internally.

**A 0.1

µF bypass capacitor must be connected between pins 1 and 4, and

5 and 8.

Description

Available in either an 8-pin DIP or

SO-8 package style respectively, the

HCPL-772X or HCPL-072X

optocouplers utilize the latest

CMOS IC technology to achieve

outstanding performance with very

low power consumption. The

HCPL-772X/072X require only two

bypass capacitors for complete

CMOS compatability.

Agilent

HCPL-0720/7720 and HCPL-0721/7721

40 ns Propagation Delay,

CMOS Optocoupler

Data Sheet

Features

• +5 V CMOS compatibility

• 20 ns maximum prop. delay skew

• High speed: 25 MBd

• 40 ns max. prop. delay

• 10 kV/

µs minimum common mode

rejection

• –40 to 85

°C temperature range

• Safety and regulatory approvals

UL recognized

3750 V rms for 1 min. per

UL 1577

CSA component acceptance

notice #5

IEC/EN/DIN EN 60747-5-2

HCPL-772X option 060

HCPL-072X option 060

Applications

• Digital fieldbus isolation: CC-Link,

DeviceNet, Profibus, SDS

• AC plasma display panel level

shifting

• Multiplexed data transmission

• Computer peripheral interface

• Microprocessor system interface

Basic building blocks of the

HCPL-772X/072X are a CMOS

LED driver IC, a high speed LED

and a CMOS detector IC. A CMOS

logic input signal controls the

LED driver IC which supplies

current to the LED. The detector

IC incorporates an integrated

photodiode, a high-speed

transimpedance amplifier, and a

voltage comparator with an

output driver.

8

7

6

1

3

SHIELD

5

2

4

**VDD1

VI

*

GND1

VDD2**

VO

GND2

VI, INPUT

LED1

H

L

OFF

ON

TRUTH TABLE

(POSITIVE LOGIC)

NC*

IO

LED1

VO, OUTPUT

H

L

CAUTION: It is advised that normal static precautions be taken in handling and assembly of this

component to prevent damage and/or degradation which may be induced by ESD.