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MC145149DW датащи(PDF) 8 Page - Motorola, Inc |
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MC145149DW датащи(HTML) 8 Page - Motorola, Inc |
8 / 12 page MC145149 MOTOROLA 8 F(s) = ζ = ωn = A) NR1C R1sC + 1 DEFINITIONS: N = Total Division Ratio in Feedback Loop K φ (Phase Detector Gain) = VDD/4π for PDout KVCO (VCO Gain) = 2 π∆fVCO ∆VVCO Damping Factor: ζ [ 1 1 C VCO PDout N ωn 2K φKVCO F(s) = ζ = ωn = B) (R1 +R2)sC + 1 R2sC + 1 C VCO R2 PDout R1 R1 NC(R1 + R2) R2C+ N K φKVCO 0.5 ωn K φKVCO K φKVCO RECOMMENDED READING: Gardner, Floyd M., Phaselock Techniques (second edition). New York, Wiley–Interscience, 1979. Manassewitsch, Vadim, Frequency Synthesizers: Theory and Design (second edition). New York, Wiley–Interscience, 1980. Blanchard, Alain, Phase–Locked Loops: Application to Coherent Receiver Design. New York, Wiley–Interscience, 1976. Egan, William F., Frequency Synthesis by Phase Lock. New York, Wiley–Interscience, 1981. Rohde, Ulrich L., Digital PLL Frequency Synthesizers Theory and Design. Englewood Cliffs, NJ, Prentice–Hall, 1983. Berlin, Howard M., Design of Phase–Locked Loop Circuits, with Experiments. Indianapolis, Howard W. Sams and Co., 1978. Kinley, Harold, The PLL Synthesizer Cookbook. Blue Ridge Summit, PA, Tab Books, 1980. AN535, Phase–Locked Loop Design Fundamentals, Motorola Semiconductor Products, Inc., 1970. AR254, Phase–Locked Loop Design Articles, Motorola Semiconductor Products, Inc., Reprinted with permission from Electronic Design, 1987. for a typical design ωn (Natural Frequency) ≈ 2 πfr 10 (at phase detector input). Figure 9. Phase–Locked Loop Low–Pass Filter Design DESIGN CONSIDERATIONS CRYSTAL OSCILLATOR CONSIDERATIONS The following options may be considered to provide a ref- erence frequency to Motorola’s CMOS frequency synthe- sizers. Use of a Hybrid Crystal Oscillator Commercially available temperature–compensate crystal oscillators (TCXOs) or crystal–controlled data clock oscilla- tors provide very stable reference frequencies. An oscillator capable of sinking and sourcing 50 µA at CMOS logic levels may be direct or dc coupled to OSCin. In general, the highest frequency capability is obtained utilizing a direct–coupled square wave having a rail–to–rail (VDD to VSS) voltage swing. If the oscillator does not have CMOS logic levels on the outputs, capacitive or ac coupling to OSCin may be used. OSCout, an unbuffered output, should be left floating. For additional information about TCXOs and data clock oscillators, please consult the latest version of the eem Elec- tronic Engineers Master Catalog, the Gold Book, or similar publications. Design an Off–Chip Reference The user may design an off–chip crystal oscillator using ICs specifically developed for crystal oscillator applications, such as the MC12061 MECL device. The reference signal from the MECL device is ac coupled to OSCin. For large am- plitude signals (standard CMOS logic levels), dc coupling is used. OSCout, an unbuffered output, should be left floating. In general, the highest frequency capability is obtained with a direct–coupled square wave having rail–to–rail voltage swing. Use of the On–Chip Oscillator Circuitry The on–chip amplifier (a digital inverter) along with an ap- propriate crystal may be used to provide a reference source frequency. A fundamental mode crystal, parallel resonant at |
Аналогичный номер детали - MC145149DW |
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Аналогичное описание - MC145149DW |
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