поискавой системы для электроныых деталей |
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LM25575QMH/NOPB датащи(PDF) 11 Page - Texas Instruments |
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LM25575QMH/NOPB датащи(HTML) 11 Page - Texas Instruments |
11 / 32 page SYNC 10k S R Q Q DEADTIME ONE-SHOT 5V 2.5V I = f(RT) SYNC LM25575 UP TO 5 TOTAL DEVICES LM25575 SYNC SYNC AGND LM25575 SW CLK SYNC SW 500 ns LM25575, LM25575-Q1 www.ti.com SNVS479G – JANUARY 2007 – REVISED APRIL 2013 Figure 3. Sync from External Clock Figure 4. Sync from Multiple Devices Multiple LM25575 devices can be synchronized together simply by connecting the SYNC pins together. In this configuration all of the devices will be synchronized to the highest frequency device. The diagram in Figure 5 illustrates the SYNC input/output features of the LM25575. The internal oscillator circuit drives the SYNC pin with a strong pull-down / weak pull-up inverter. When the SYNC pin is pulled low either by the internal oscillator or an external clock, the ramp cycle of the oscillator is terminated and a new oscillator cycle begins. Thus, if the SYNC pins of several LM25575 IC’s are connected together, the IC with the highest internal clock frequency will pull the connected SYNC pins low first and terminate the oscillator ramp cycles of the other IC’s. The LM25575 with the highest programmed clock frequency will serve as the master and control the switching frequency of the all the devices with lower oscillator frequency. Figure 5. Simplified Oscillator Block Diagram and SYNC I/O Circuit Copyright © 2007–2013, Texas Instruments Incorporated Submit Documentation Feedback 11 Product Folder Links: LM25575 LM25575-Q1 |
Аналогичный номер детали - LM25575QMH/NOPB |
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Аналогичное описание - LM25575QMH/NOPB |
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