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STDV3055L104T4G датащи(PDF) 1 Page - ON Semiconductor |
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STDV3055L104T4G датащи(HTML) 1 Page - ON Semiconductor |
1 / 9 page © Semiconductor Components Industries, LLC, 2016 September, 2016 − Rev. 10 1 Publication Order Number: NTD3055L104/D NTD3055L104, NTDV3055L104 Power MOSFET 12 A, 60 V, Logic Level N−Channel DPAK/IPAK Designed for low voltage, high speed switching applications in power supplies, converters and power motor controls and bridge circuits. Features • Lower RDS(on) • Lower VDS(on) • Tighter VSD Specification • Lower Diode Reverse Recovery Time • Lower Reverse Recovery Stored Charge • NTDV and STDV Prefixes for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC−Q101 Qualified and PPAP Capable • These Devices are Pb−Free and are RoHS Compliant Typical Applications • Power Supplies • Converters • Power Motor Controls • Bridge Circuits MAXIMUM RATINGS (TJ = 25°C unless otherwise noted) Rating Symbol Value Unit Drain−to−Source Voltage VDSS 60 Vdc Drain−to−Gate Voltage (RGS = 10 MW) VDGR 60 Vdc Gate−to−Source Voltage, Continuous − Non−Repetitive (tpv10 ms) VGS VGS "15 "20 Vdc Drain Current − Continuous @ TA = 25°C − Continuous @ TA = 100°C − Single Pulse (tpv10 ms) ID ID IDM 12 10 45 Adc Apk Total Power Dissipation @ TA = 25°C Derate above 25 °C Total Power Dissipation @ TA = 25°C (Note 1) Total Power Dissipation @ TA = 25°C (Note 2) PD 48 0.32 2.1 1.5 W W/ °C W W Operating and Storage Temperature Range TJ, Tstg − 55 to +175 °C Single Pulse Drain−to−Source Avalanche Energy − Starting TJ = 25°C (VDD = 25 Vdc, VGS = 5.0 Vdc, L = 1.0 mH IL(pk) = 11 A, VDS = 60 Vdc) EAS 61 mJ Thermal Resistance, − Junction−to−Case − Junction−to−Ambient (Note 1) − Junction−to−Ambient (Note 2) RqJC RqJA RqJA 3.13 71.4 100 °C/W Maximum Lead Temperature for Soldering Purposes, 1/8 ″ from case for 10 seconds TL 260 °C Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. 1. When surface mounted to an FR4 board using 1 ″ pad size, (Cu Area 1.127 in2). 2. When surface mounted to an FR4 board using the minimum recommended pad size, (Cu Area 0.412 in2). N−Channel D S G 60 V 104 m W RDS(on) TYP 12 A ID MAX V(BR)DSS See detailed ordering and shipping information in the package dimensions section on page 7 of this data sheet. ORDERING INFORMATION 1 Gate 3 Source 2 Drain 4 Drain DPAK CASE 369C STYLE 2 MARKING DIAGRAMS & PIN ASSIGNMENTS 1 2 3 4 1 Gate 3 Source 2 Drain 4 Drain IPAK CASE 369D STYLE 2 1 2 3 4 A = Assembly Location* 55L104 = Device Code Y = Year WW = Work Week G = Pb−Free Package www.onsemi.com * The Assembly Location code (A) is front side optional. In cases where the Assembly Location is stamped in the package, the front side assembly code may be blank. |
Аналогичный номер детали - STDV3055L104T4G |
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Аналогичное описание - STDV3055L104T4G |
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