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74LVT16652 датащи(PDF) 3 Page - National Semiconductor (TI) |
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74LVT16652 датащи(HTML) 3 Page - National Semiconductor (TI) |
3 / 6 page Functional Description In the transceiver mode data present at the HIGH imped- ance port may be stored in either the A or B register or both The select (SABn SBAn) controls can multiplex stored and real-time The examples in Figure 1 demonstrate the four fundamental bus-management functions that can be performed with the LVT16652 Data on the A or B data bus or both can be stored in the internal D flip-flop by LOW to HIGH transitions at the appro- priate Clock Inputs (CPABn CPBAn) regardless of the Se- lect or Output Enable Inputs When SAB and SBA are in the real time transfer mode it is also possible to store data without using the internal D flip-flops by simultaneously en- abling OEABn and OEBAn In this configuration each Output reinforces its Input Thus when all other data sources to the two sets of bus lines are in a HIGH impedance state each set of bus lines will remain at its last state Real-Time Transfer Bus B to Bus A TLF12024 4 OEAB1 OEBA1 CPAB1 CPBA1 SAB1 SBA1 LL X X X L Real-Time Transfer Bus A to Bus B TLF12024 5 OEAB1 OEBA1 CPAB1 CPBA1 SAB1 SBA1 HHX X L X Storage TLF12024 6 OEAB1 OEBA1 CPAB1 CPBA1 SAB1 SBA1 XH L XX X LX X L XX LH LL XX Transfer Storage Data to A or B TLF12024 7 OEAB1 OEBA1 CPAB1 CPBA1 SAB1 SBA1 H L HorL HorL H H FIGURE 1 Truth Table (Note) Inputs InputsOutputs Operating Mode OEAB1 OEBA1 CPAB1 CPBA1 SAB1 SBA1 A0 thru A7 B0 thru B7 L H HorL HorL X X Input Input Isolation LH LL X X Store A and B Data XH L H or L X X Input Not Specified Store A Hold B HH LL X X Input Output Store A in Both Registers L X HorL L X X Not Specified Input Hold A Store B LL LL X X Output Input Store B in Both Registers LL X X X L Output Input Real-Time B Data to A Bus L L X H or L X H Store B Data to A Bus HHX X L X Input Output Real-Time A Data to B Bus H H H or L X H X Stored A Data to B Bus H L H or L H or L H H Output Output Stored A Data to B Bus and Stored B Data to A Bus H HIGH Voltage Level L LOW Voltage Level X Immaterial L LOW to HIGH Clock Transition Note The data output functions may be enabled or disabled by various signals at OEAB or OEBA inputs Data input functions are always enabled ie data at the bus pins will be stored on every LOW to HIGH transition on the clock inputs This also applies to data IO (A and B 8–15) and 2 control pins http www nationalcom 3 |
Аналогичный номер детали - 74LVT16652 |
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Аналогичное описание - 74LVT16652 |
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