поискавой системы для электроныых деталей |
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DAC5675 датащи(PDF) 9 Page - Texas Instruments |
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DAC5675 датащи(HTML) 9 Page - Texas Instruments |
9 / 27 page DAC5675 SLAS352B – DECEMBER 2001 – REVISED JUNE 2002 9 www.ti.com clock input and timing (continued) Figure 7 shows the equivalent schematic of the differential clock input buffer. The input nodes are internally self-biased enabling ac coupling of the clock inputs. Figure 8 shows the preferred configuration for driving the DAC5675. Ropt 22 Ω Node CLKC Internally Biased DAC5675 TTL/CMOS Source 0.01 µF CLK CLKC Figure 7. Driving the DAC5675 With a Single-Ended TTL/CMOS Clock Source RT 50 Ω DAC5675 CAC 0.01 µF CAC 0.01 µF RT 50 Ω VTT Differential ECL or (LV)PECL Source + – CLK CLKC Figure 8. Driving the DAC5675 With a Differential ECL/PECL Clock Source RT 50 Ω DAC5675 CAC 0.01 µF CAC 0.01 µF RT 50 Ω VTT Single-Ended ECL or (LV)PECL Source ECL/PECL Gate CLK CLKC Figure 9. Driving the DAC5675 With a Single-Ended ECL/PECL Clock Source |
Аналогичный номер детали - DAC5675 |
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Аналогичное описание - DAC5675 |
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