поискавой системы для электроныых деталей |
|
SI5010 датащи(PDF) 6 Page - List of Unclassifed Manufacturers |
|
SI5010 датащи(HTML) 6 Page - List of Unclassifed Manufacturers |
6 / 16 page Si 50 10 6 Preliminary Rev. 0.31 Table 2. DC Characteristics (VDD = 2.5 V ± 5%, TA = –40°C to 85°C) Parameter Symbol Test Condition Min Typ Max Unit Supply Current OC-12 OC-3 IDD — — 117 124 127 134 mA Power Dissipation OC-12 OC-3 PD — — 293 310 333 352 mW Common Mode Input Voltage (DIN, REFCLK) VICM varies with VDD —.80 " VDD —V Input Voltage Range* (DIN+, DIN–, REFCLK+, REFCLK–) VIS See Figure 2 — — 750 mV Differential Input Voltage Swing* (DIN, REFCLK) VID See Figure 2 200 — 1500 mV (pk-pk) Input Impedance (DIN, REFCLK) RIN Line-to-Line 84 100 116 Ω Differential Output Voltage Swing (DOUT) VOD 100 Ω Load Line-to-Line TBD 940 TBD mV (pk-pk) Differential Output Voltage Swing (CLKOUT) VOD 100 Ω Load Line-to-Line TBD 900 TBD mV (pk-pk) Output Common Mode Voltage (DOUT,CLKOUT) VOCM 100 Ω Load Line-to-Line —VDD –0.7 — V Output Impedance (DOUT,CLKOUT) ROUT Single-ended 84 100 116 Ω Output Short to GND (DOUT,CLKOUT) ISC(–) —25 TBD mA Output Short to VDD (DOUT,CLKOUT) ISC(+) TBD –15 — mA Input Voltage Low (LVTTL Inputs) VIL —— .8 V Input Voltage High (LVTTL Inputs) VIH 2.0 — — V Input Low Current (LVTTL Inputs) IIL —— 10 µA Input High Current (LVTTL Inputs) IIH —— 10 µA Output Voltage Low (LVTTL Outputs) VOL IO = 2 mA — — 0.4 V Output Voltage High (LVTTL Outputs) VOH IO = 2 mA 2.0 — — V Input Impedance (LVTTL Inputs) RIN 10 — — k Ω PWRDN/CAL Leakage Current IPWRDN VPWRDN ≥ 0.8 V TBD 25 TBD µA *Note: The DIN and REFCLK inputs may be driven differentially or single-endedly. When driving single-endedly, the voltage swing of the signal applied to the active input must exceed the specified minimum Differential Input Voltage Swing (VID min) and the unused input must be tied to ground. When driving differentially, the difference between the positive and negative input signals must exceed VID min. (Each individual input signal needs to swing only half of this range.) In either case, the voltage applied to any individual pin (DIN+, DIN–, REFCLK+, or REFCLK–) must not exceed the specified maximum Input Voltage Range (VIS max). |
Аналогичный номер детали - SI5010 |
|
Аналогичное описание - SI5010 |
|
|
ссылки URL |
Конфиденциальность |
ALLDATASHEETRU.COM |
Вашему бизинису помогли Аллдатащит? [ DONATE ] |
Что такое Аллдатащит | реклама | контакт | Конфиденциальность | обмен ссыками | поиск по производителю All Rights Reserved©Alldatasheet.com |
Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
Family Site : ic2ic.com |
icmetro.com |