SN74LVTH322374

3.3V ABT 32BIT EDGETRIGGERED DTYPE FLIPFLOP

WITH 3STATE OUTPUTS

SCBS754B − MARCH 2002 − REVISED SEPTEMBER 2003

5

POST OFFICE BOX 655303

timing requirements over recommended operating free-air temperature range (unless otherwise

noted) (see Figure 1)

VCC = 3.3 V

± 0.3 V

VCC = 2.7 V

UNIT

MIN

MAX

MIN

MAX

UNIT

fclock

Clock frequency

160

160

MHz

tw

Pulse duration, CLK high or low

3

3

ns

tsu

Setup time, data before CLK

↑

High or low

1.8

2

ns

th

Hold time, data after CLK

↑

High or low

0.8

0.1

ns

(unless otherwise noted) (see Figure 1)

PARAMETER

FROM

(INPUT)

TO

(OUTPUT)

VCC = 3.3 V

± 0.3 V

VCC = 2.7 V

UNIT

PARAMETER

(INPUT)

(OUTPUT)

MIN

TYP†

MAX

MIN

MAX

UNIT

fmax

160

160

MHz

tPLH

CLK

Q

2

3.4

5.3

6.2

ns

tPHL

CLK

Q

2.2

3.3

4.9

5.1

ns

tPZH

OE

Q

1.8

3.5

5.6

6.9

ns

tPZL

OE

Q

1.8

3.5

4.9

6

ns

tPHZ

OE

Q

2.4

4.2

5.4

5.7

ns

tPLZ

OE

Q

2

3.8

5

5.1

ns

tsk(o)

0.5

ns

† All typical values are at VCC = 3.3 V, TA = 25°C.