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TC7MH175FK датащи(PDF) 4 Page - Toshiba Semiconductor

номер детали TC7MH175FK
подробное описание детали  TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic
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производитель  TOSHIBA [Toshiba Semiconductor]
домашняя страница  http://www.semicon.toshiba.co.jp/eng
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TC7MH175FK датащи(HTML) 4 Page - Toshiba Semiconductor

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TC7MH175FK
2001-10-23
4
Timing Requirements (Input: tr =
=== tf ==== 3 ns)
Ta
= 25°C
Ta
= −40~85°C
Characteristics
Symbol
Test Condition
VCC (V)
Typ.
Limit
Limit
Unit
3.3
± 0.3
5.0
5.0
Minimum pulse width
(CK)
tw (L)
tw (H)
5.0
± 0.5
5.0
5.0
ns
3.3
± 0.3
5.0
5.0
Minimum pulse width
( CLR )
tw (L)
5.0
± 0.5
5.0
5.0
ns
3.3
± 0.3
5.0
5.0
Minimum set-up time
t s
5.0
± 0.5
4.0
4.0
ns
3.3
± 0.3
1.0
1.0
Minimum hold time
t h
5.0
± 0.5
1.0
1.0
ns
3.3
± 0.3
5.0
5.0
Minimum removal time
( CLR )
trem
5.0
± 0.5
5.0
5.0
ns
AC Characteristics (Input: tr =
=== tf ==== 3 ns)
Ta
= 25°C
Ta
= −40~85°C
Characteristics
Symbol
Test Condition
VCC (V) CL (pF)
Min
Typ.
Max
Min
Max
Unit
15
7.5
11.5
1.0
13.5
3.3
± 0.3
50
10.0
15.0
1.0
17.0
15
4.8
7.3
1.0
8.5
Propagation delay time
(CK-Q)
tpLH
tpHL
5.0
± 0.5
50
6.3
9.3
1.0
10.5
ns
15
6.3
10.1
1.0
12.0
3.3
± 0.3
50
8.8
13.6
1.0
15.5
15
4.3
6.4
1.0
7.5
Propagation delay time
( CLR -Q)
tpHL
5.0
± 0.5
50
5.8
8.4
1.0
9.5
ns
15
90
140
75
3.3
± 0.3
50
50
75
45
15
150
210
125
Maximum clock frequency
fmax
5.0
± 0.5
50
85
115
75
MHz
3.3
± 0.3
50
1.5
1.5
Output to output skew
tosLH
tosHL
(Note1)
5.0
± 0.5
50
1.0
1.0
ns
Input capacitance
CIN
4
10
10
pF
Power dissipation
capacitance
CPD
(Note2)
44
pF
Note1: Parameter guaranteed by design.
tosLH = |tpLHm − tpLHn|, tosHL = |tpHLm − tpHLn|
Note2: CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating
current consumption without load.
Average operating current can be obtained by the equation:
ICC (opr) = CPD･VCC･fIN + ICC/4 (per bit)
And the total CPD when n pcs of flip-flop operate can be gained by the following equation:
CPD (total) = 30 + 14･n


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