AD7147A datasheet(30/69 Pages) AD

номер детали	AD7147A

подробное описание детали	CapTouch Programmable Controller

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AD7147A

Rev. B | Page 29 of 68

GPIO INT OUTPUT CONTROL

The INT output signal can be controlled by the GPIO pin when

the GPIO is configured as an input. The GPIO is configured as

an input by setting the GPIO_SETUP bits in the interrupt enable

register to 01. See the

section for more information on how to configure the GPIO.

General-Purpose Input/Output (GPIO)

Enable the GPIO interrupt by setting the GPIO_INT_ENABLE

bit in Register 0x007 to 1, or disable the GPIO interrupt by

clearing this bit to 0. The GPIO status bit in the conversion-

complete interrupt status register reflects the status of the GPIO

interrupt. This bit is set to 1 when the GPIO has triggered INT.

The bit is cleared upon reading the GPIO_INT_STATUS bit if the

condition that caused the interrupt is no longer present.

The GPIO interrupt can be set to trigger on a rising edge, falling

edge, high level, or low level at the GPIO input pin. Table 16 shows

how the settings of the GPIO_INPUT_CONFIG bits in the inter-

rupt enable (STAGE_LOW_INT_ENABLE) register affect the

behavior of INT.

Figure 42 to Figure 45 show how the interrupt output is cleared

upon a read from the GPIO_INT_STATUS bit.

Table 16. GPIO Interrupt Behavior

GPIO_INPUT_CONFIG

GPIO Pin

GPIO_INT_STATUS

INT

INT Behavior

00 = Negative Level Triggered

1

0

1

Not triggered

00 = Negative Level Triggered

0

1

0

Asserted while signal on GPIO pin is low

01 = Positive Edge Triggered

1

0

Pulses low at low-to-high GPIO transition

01 = Positive Edge Triggered

0

1

Not triggered

10 = Negative Edge Triggered

1

0

1

Pulses low at high-to-low GPIO transition

10 = Negative Edge Triggered

0

1

0

Not triggered

11 = Positive Level Triggered

1

0

Asserted while signal on GPIO pin is high

11 = Positive Level Triggered

0

1

Not triggered

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