поискавой системы для электроныых деталей |
|
AD73322L датащи(PDF) 33 Page - Analog Devices |
|
AD73322L датащи(HTML) 33 Page - Analog Devices |
33 / 49 page AD73322L Rev. A | Page 32 of 48 DESIGN CONSIDERATIONS The AD73322L features both differential inputs and outputs on each channel to provide optimal performance and avoid common-mode noise. It is also possible to interface either inputs or outputs in single-ended mode. This section details the choice of input and output configurations and also gives some tips towards successful configuration of the analog interface sections. CONTINUOUS TIME LOW-PASS FILTER VREF VFBN1 VINN1 VINP1 VFBP1 VOUTP1 VOUTN1 AD73322L +6/–15dB PGA 0/38dB PGA GAIN ±1 REFOUT REFCAP REFERENCE VREF 0.047 µF 0.047 µF 100 Ω 100 Ω 0.1 µF ANTI-ALIAS FILTER Figure 33. Analog Input (DC-Coupled) ANALOG INPUTS There are several different ways in which the analog input (encoder) section of the AD73322L can be interfaced to external circuitry. It provides optional input amplifiers which allow sources with high source impedance to drive the ADC section correctly. When the input amplifiers are enabled, the input channel is configured as a differential pair of inverting amplifiers referenced to the internal reference (REFCAP) level. The inverting terminals of the input amplifier pair are designated as Pins VINP1 and VINN1 for Channel 1 (VINP2 and VINN2 for Channel 2). The amplifier feedback connections are available on Pins VFBP1 and VFBN1 for Channel 1 (VFBP2 and VFBN2 for Channel 2). For applications where external signal buffering is required, the input amplifiers can be bypassed and the ADC driven directly. When the input amplifiers are disabled, the sigma- delta modulator’s input section (SC PGA) is accessed directly through the VFBP1 and VFBN1 pins for Channel 1 (VFBP2 and VFBN2 for Channel 2). It is also possible to drive the ADCs in either differential or single-ended modes. If the single-ended mode is chosen, it is possible using software control to multiplex between two single- ended inputs connected to the positive and negative input pins. The primary concerns in interfacing to the ADC are, first, to provide adequate antialias filtering and to ensure that the signal source drives the switched-capacitor input of the ADC correctly. The sigma-delta design of the ADC and its over- sampling characteristics simplify the antialias requirements, but the single-pole RC filter is primarily intended to eliminate aliasing of frequencies above the Nyquist frequency of the sigma-delta modulator’s sampling rate (typically 2.048 MHz). It may still require a more specific digital filter implementation in the DSP to provide the final signal-frequency response characteristics. For optimum performance, the capacitors used for the antialiasing filter must be of high quality dielectric (NPO). A second concern is interfacing the signal source to the ADC’s switched capacitor input load. The SC input presents a complex dynamic load to a signal source, therefore, note that the slew rate characteristic is an important consideration when choosing external buffers for use with the AD73322L. The internal inverting op amps on the AD73322L are specifically designed to interface to the ADC’s SC input stage. The AD73322L’s on-chip 38 dB preamplifier can be enabled when there is not enough gain in the input circuit; the pre- amplifier is configured by bits IGS0-2 of CRD. The total gain must be configured to ensure that a full-scale input signal produces a signal level at the input to the sigma-delta modulator of the ADC that does not exceed the maximum input range. The dc biasing of the analog input signal is accomplished with an on-chip voltage reference. If the input signal is not biased at the internal reference level (via REFOUT), then it must be ac-coupled with external coupling capacitors. CIN should be 0.1 µF or larger. The dc biasing of the input can then be accomplished using resistors to REFOUT, as Figure 36 and Figure 37 show. CONTINUOUS TIME LOW-PASS FILTER VREF VFBN1 VINN1 VINP1 VFBP1 VOUTP1 VOUTN1 AD73322L +6/–15dB PGA 0/38dB PGA GAIN ±1 REFOUT REFCAP REFERENCE VREF 0.047 µF 0.047 µF 100 Ω 100 Ω 0.1 µF OPTIONAL BUFFER ANTI-ALIAS FILTER Figure 34. Analog Input (DC-Coupled) Using External Amplifiers |
Аналогичный номер детали - AD73322L_17 |
|
Аналогичное описание - AD73322L_17 |
|
|
ссылки URL |
Конфиденциальность |
ALLDATASHEETRU.COM |
Вашему бизинису помогли Аллдатащит? [ DONATE ] |
Что такое Аллдатащит | реклама | контакт | Конфиденциальность | обмен ссыками | поиск по производителю All Rights Reserved©Alldatasheet.com |
Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
Family Site : ic2ic.com |
icmetro.com |